Nanowerk

Common lab design inflates 2D transistor performance by up to six times

Lab architecture used to test 2D semiconductors artificially boosts performance metrics, making it harder to assess whether these materials can truly replace silicon.

Most lab testing quietly inflates 2D transistor performance, research reveals

For nearly two decades, two-dimensional (2D) semiconductors have been studied as a complement or possible successor to silicon transistors, promising smaller, faster and more energy-efficient ...
IEEE

Single Input Multi Output Model of Molecular Communication via Diffusion With Spheroidal Receivers

Abstract: Spheroids are aggregates of cells that can mimic the cellular organization often found in tissues. Spheroids can be created from various cell types, including cancer cells, stem cells, and ...
Duke Pratt School of Engineering

Study Finds Next-Generation Transistor Performance Inflated in Most Lab Testing

Duke engineers show how a common device architecture used to test 2D transistors overstates their performance prospects in real-world devices.
IEEE

Predictive Modelling of Type 2 Diabetes via Glucose-Insulin Interactions Using Machine Learning Techniques

Abstract: A metabolic disorder, Type 2 Diabetes (T2D), where the human body unable to utilize and store glucose properly, results from chronically increased blood glucose (BG) levels. In particular, ...