Electronic Design

Embedded Test Complements Boundary Scan

Companies specializing in circuit board and system design-for-test (DFT) tools are pursuing a variety of strategies to serve test and debug applications based on innovations they announced over the ...
Design-Reuse

SynTest Receives "Multiple-capture DFT system for scan-based integrated circuits" Patent for At-Speed Scan/BIST Invention

SAN JOSE, Calif., Oct 19, 2005-- SynTest Technologies, Inc., a leading supplier of Design-for-Test (DFT) tools, was granted 33 claims on Oct. 11, 2005 under United States Patent # 6,954,887 for its ...
Semiconductor Engineering

The Era Of Packetized Scan Test Has Arrived

For decades, process and design scaling has triggered the adoption of transformative test solutions. About twenty years ago, when at-speed test became a de-facto requirement, on-chip compression ...
Electronic Design

Scan Software Squashes Circuit Test Time

Scan Software Squashes Circuit Test Time Reduced test data volume, test run time, and automatic test equipment (ATE) reloads come via VirtualScan software, which ultimately slashes the cost of ...
EDN

Boundary scan: Seven benefits

Boundary Scan: What Is It? Boundary scan test techniques were first discussed in the late 1980s. At the time, experts believed that the growing complexity of chips would have a serious effect on an ...