EDN

SIMULATION: PSP transistor tapped for standard

San Francisco — After months of intense and reportedly often heated debate, the Compact Model Council has selected a new industry standard CMOS transistor model. Jointly developed by Pennsylvania ...
Nanowerk

Molybdenum disulfide memristors make the leap to standard CMOS chips

Nanoscale molybdenum disulfide memristors integrated onto standard CMOS chips achieve the lowest switching voltage reported ...
EDN

Models for high-voltage transistors in a standard CMOS process

Designers of electronics and communications systems are constantly faced with the challenge of integrating greater functionality on less silicon area. Many of the system blocks – such as power ...
Electronic Design

Dirt Cheap ASIC Design for Dummies (Part 3): NMOS, PMOS Silicon Design Using a Web Browser

Quickly learn what the difference is between PMOS and NMOS transistors in their structure and operation, and how CMOS works with the two in combination. Siliwiz, a free, browser-based, ASIC layout ...
New Electronics

Nanowire transistors the way forward, says simulation specialist

Risk is the biggest issue facing semiconductor manufacturers, according to Professor Asen Asenov, the Glasgow University academic who is also chief executive of Gold Standard Simulations (GSS), which ...
Business Wire

X-FAB Sets the Benchmark for Low-Noise CMOS by Reducing Flicker Noise by a Factor of Five with Its New Cost-Effective Transistors on 0.35µm and 0.18µm CMOS Platforms

ERFURT, Germany--(BUSINESS WIRE)--X-FAB Silicon Foundries, the leading More-than- Moore foundry, today announced new transistors that have drastically reduced flicker noise on its mixed-signal 0.35µm ...
CIOL

Fujitsu develops CMOS logic-based HV transistor

BANGALORE, INDIA: Fujitsu Microelectronics Asia Pte Ltd (FMAL) announced that Fujitsu Laboratories Ltd and Fujitsu Microelectronics Ltd have co-developed a CMOS logic process-based high-voltage ...